Cadence Design Systems, Inc. , the leader in global electronic design innovation, has released Perspec System Verifier 23.03 is a portable stimulus, system-on-chip (SoC) verification solution.
Perspec System Verifier is an automation tool for model-based test generation. Perspec generated tests exercise hardware designs at different levels of integration, from IPs and subsystems to full-chip and system levels. Perspec can target different platforms and verification environments, including virtual platforms, simulation, emulation, FPGA prototyping, and post-silicon testing. The tool supports scenario randomization, code generation for target execution, functional coverage collection, self-checking infrastructure, and debugging facilities.
Verification of your mixed-signal design can be a nightmare, with clashing disciplines and engineering cultures, and challenging use-case requirements. In this episode of Chalk Talk, Amelia Dalton chats with Steve Carlson of Cadence Design Systems about a comprehensive approach to mixed-signal system verification.
Cadence is a pivotal leader in electronic design and computational expertise, using its Intelligent System Design strategy to turn design concepts into reality. Cadence customers are the world’s most creative and innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications.
Owner: Cadence Design Systems Inc.
Product Name: Perspec System Verifier
Version: 23.03.001 Base release
Supported Architectures: x86-64
Website Home Page : http://www.cadence.com
Languages Supported: english
System Requirements: Linux *
Size: 4.2 Gb
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